Implementation of SDR-based digital IF for multi-band W-CDMA transceiver

초록

This paper discusses the implementation of multi-band digital intermediate frequency (IF) for wideband CDMA (W-CDMA) transceiver. The majority of the implemented module in hardware is composed of wideband analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and field programmable-gated-arrays (FPGA). And in software, it is coded by VHSIC hardware description language (VHDL) for realizing digital filters and numerically controlled oscillator, etc. To cope with the hardware limitation such as the number of gates in FPGA, the overall digital filter embedded in transceiver is constructed via a cascading a series of decimation and interpolation filters. At transmitter, in order to upconvert the multi-band baseband channels simultaneously, two-stage digital complex quadrature modulation (DCQM) is utilized. The relevant up-and-down conversion of the numerically controlled oscillator (NCO) is designed in the form of a look-up-table (LUT), having samples associated with a sampled sinusoidal with period of 1/4. At receiver, to avoid the usage of surface acoustic wave (SAW) filter, the high-performance digital filter is implemented subject to satisfying band rejection ratio prescribed in blocker and adjacent channel specification. This paper provides the performance of the implemented digital IF module by revealing the results taken from the measurement instruments. Moreover, to confirm its validity computer simulations are simultaneously conducted.

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