Improving MRAM Performance with Sparse Modulation and Hamming Error Correction

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초록

With the rise of the Internet of Things (IoT), smart sensors are increasingly being deployed as compact edge processing units, necessitating continuously writable memory with low power consumption and fast access times. Magnetic random-access memory (MRAM) has emerged as a promising non-volatile alternative to conventional DRAM and SDRAM, offering advantages such as faster access speeds, reduced power consumption, and enhanced endurance. However, MRAM is subject to challenges including process variations and thermal fluctuations, which can induce random bit errors and result in imbalanced probabilities of 0 and 1 bits. To address these issues, we propose a novel sparse coding scheme characterized by a minimum Hamming distance of three. During the encoding process, three check bits are appended to the user data and processed using a generator matrix. If the resulting codeword fails to satisfy the sparsity constraint, it is inverted to comply with the coding requirement. This method is based on the error characteristics inherent in MRAM to facilitate effective error correction. Furthermore, we introduce a dynamic threshold detection technique that updates bit probability estimates in real time during data transmission. Simulation results demonstrate substantial improvements in both error resilience and decoding accuracy, particularly as MRAM density increases.

키워드

asymmetric write error ratecascaded channelerror correction codes (ECCs)the Hamming codenon-volatile RAMsparse codesspin-torque transfer magnetic random-access memory (STT-MRAM)STT-RAMRELIABILITYCIRCUITDESIGNMEMORY
제목
Improving MRAM Performance with Sparse Modulation and Hamming Error Correction
저자
Le, NamNguyen, Thien AnLee, Jong-HoLee, Jaejin
DOI
10.3390/s25134050
발행일
2025-06
유형
Article
저널명
Sensors
25
13