Feasibility of a full-duplex relay based on direct interference subtraction

초록

Full-duplex relay (FDR) has a lot of advantages as compared to the conventional half-duplex relay. In practice, however, strong self-interference issue must be resolved to realize an FDR. In this paper, the feasibility of an FDR is investigated from the perspective of the dynamic range of analog-to-digital converter (ADC) and accuracy of channel estimation, which are highly related to the self-interference. We first present a simple FDR architecture based on direct interference subtraction, and then analyze required conditions for the FDR to work under an acceptable interference level in terms of the number of bits in the ADC and accuracy of the channel estimation. Numerical results will also be provided to show how the self-interference is controlled by the derived requirements. © 2015 International Information Institute.

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