A CMOS Antiphase Power Amplifier With an MGTR Technique for Mobile Applications

초록

In this paper, a CMOS antiphase power amplifier (PA) is presented with a multigate transistor (MGTR) technique that improves its linearity. The drive stage of the PA is biased in the subthreshold region, such as in class C, to realize the antiphase technique. The nonlinearity of the power stage of the PA is canceled out using the third-order intermodulation distortion and phase distortion of the drive stage. The cancellation effect is further optimized and enhanced without any performance degradation with the aid of the proposed MGTR technique at the drive stage. Unlike the traditional technique, which suppresses the nonlinearity of the PA, the MGTR technique is used to enhance the nonlinearity of the drive stage to cancel out the significant nonlinearity of the power stage. The proposed PA is fabricated with a 180-nm RF CMOS process and used to verify the linearity by WCDMA and LTE signals. The measurement results show an average output power of 25.8 dBm, PAE of 28%, and error vector magnitude of 3% at 1.85 GHz for the WCDMA. The PA also shows an average output power of 24.4-25.8 dBm at 1.7-2.0 GHz for the WCDMA. The PA is verified for LTE signals with 10 MHz of bandwidth/16 QAM and with 20 MHz of bandwidth/64 QAM. No digital predistortion or off-chip components are utilized.

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