Power detection method using a virtual ground node for RF CMOS power amplifier applications

초록

We propose a power detection method for RF CMOS power amplifier applications using the second harmonic component at the virtual ground node. With the proposed detection method, we remove the fundamental signal distortion problems. Because the input of the power detector is the second harmonic component of virtual ground node of the amplifier, the ripple voltage can be reduced compared to when the fundamental signal component is used. We designed a simple amplifier with the proposed detection method and verify the feasibility of the proposed method.

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