A hierarchical tiling algorithm for tile based rendering with Global Scratch Counter under multi core environment

  • Kim, J.-S.; 
  • Kim, D.-H.; 
  • Lee, K.-Y.; 
  • Kwon, Y.-S.; 
  • Eum, N.-W.; 
  • ... Lee, C.

초록

As mobile computing technologies are developed, multi-core processors are introduced to the mobile devices. Multi-core, multi-thread systems require parallel processing software. In this paper, we propose an effective method of tile based rendering for a multi-core based GP-GPU environment.[1] A tile based rendering technique is adopted to reduce an amount of data transfer between the processor and external memory for resource-limited mobile environment.[2] The proposed algorithm is parallelized for multi-core environment with Global Scratch Counters. Tiling performance is also improved using hierarchical tiling technique. © 2011 IEEE.

제목
A hierarchical tiling algorithm for tile based rendering with Global Scratch Counter under multi core environment
저자
Kim, J.-S.; Kim, D.-H.; Lee, K.-Y.; Kwon, Y.-S.; Eum, N.-W.; Lee, C.
DOI
10.1109/TENCON.2011.6129091
발행일
2011
학회명
2011 IEEE Region 10 Conference: Trends and Development in Converging Technology Towards 2020, TENCON 2011
개최지
Bali
학회 개최일
2011-11-21 ~ 2011-11-24