Design Technique of K-Band CMOS Phase Shifter with L-C-L T-Type Low Pass Structure

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6

초록

In this study, we designed a 5-bit K-band CMOS switch type phase shifter. In order to minimize phase and gain errors, a design technique for bits constituting the phase shifter was proposed. The proposed design technique has been achieved by adjusting the resonant frequencies of inductance and capacitance in the L-C-L T-type low pass filter structure. Through this, a method of optimizing the phase shifter with the T-type low pass filter structure was presented. The K-band 5-bit phase shifter was designed with a 65 nm CMOS process to verify the feasibility of the proposed design technique. The core size was 0.78 x 0.21 mm(2). At the frequency ranges of 22.0 to 23.0 GHz, the insertion loss and RMS phase and gain errors were measured to be 7.44 +/- 2.0 dB, 2.6(degrees) and 1.2 dB, respectively.

키워드

CMOS; gain error; phase error; phase shifter
제목
Design Technique of K-Band CMOS Phase Shifter with L-C-L T-Type Low Pass Structure
저자
Jang, Seongjin; Kim, Choul-Young; Park, Changkun
DOI
10.3390/electronics12173678
발행일
2023-09
유형
Article
저널명
ELECTRONICS
권
12
호
17