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A high-performance & low-power unified 4×4 / 8×8 transform architecture for the H.264/AVC codec
- Choi, W.;
- Park, J.;
- Lee, S.
초록
In this paper, we propose a high performance and low power unified 8×8 transform and 4×4 transform architecture for the H.264/AVC codec. The proposed architecture integrates 4×4 transforms and 8×8 transforms in the common architecture with reusability, which reduces complexity significantly. Also, we simplify the transform architecture and data flow to get the high performance merit without decomposition. Furthermore 8×8 transforms can be processed in 5cycles by parallel processing. This way the transform architecture can process full-HD (1080p) video images at 27MHz clock frequency, therefore we get the low power merit. As a result, the proposed architecture trades-off high performance and low power against chip area. © 2008 IEEE.
- 제목
- A high-performance & low-power unified 4×4 / 8×8 transform architecture for the H.264/AVC codec
- 저자
- Choi, W.; Park, J.; Lee, S.
- 발행일
- 2008-11
- 학회명
- 2008 23rd International Conference Image and Vision Computing New Zealand, IVCNZ
- 개최지
- Christchurch
- 개최국가
- 미국
- 학회 개최일
- 2008-11-26 ~ 2008-11-28
- 언어
- ENG