Design of a programmable crypto-processor for multiple crypto-systems

초록

We propose a programmable architecture for cryptography coprocessors with a 32 bit I/O interface. The coprocessor consists of a programmable finite field arithmetic unit, an I/O unit, a register file, and a programmable control unit. The cryptosystem is determined and configured by the micro-codes in memory of the control unit. The coprocessor has a modular structure so that the arithmetic unit can be replaced if a substitute has an appropriate I/O ports. It can be used in many cryptosystems using corresponding microcodes. ©2004 IEEE.