Design of 6 GHz Variable-Gain Low-Noise Amplifier Using Adaptive Bias Circuit for Radar Receiver Front End

  • Nam, Hyungseok; 
  • Nguyen, Dang-An; 
  • Kim, Yanghyun; 
  • Seo, Chulhun
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초록

This paper presents a variable-gain low-noise amplifier (VGLNA) based on an adaptive bias (ADB) circuit for the radar receiver front end. The ADB circuit processes the signal separated by a coupler at the LNA output port. First, the ADB circuit rectifies the coupled signal into positive DC voltage through a rectifier, which is then inverted to control a junction-gate field-effect transistor (JFET). The voltage-controlled current of JFET flows through a voltage-divider network and finally produces the DC biasing voltage for the BJT base termination, which decreases with the increase in the input RF power. The proposed VGLNA operates automatically in high gain at low input power and low gain at high input power, providing a wider dynamic range as compared to the constant-bias counterpart. For validation, a prototype is fabricated and measured at 6 GHz. As observed, the base biasing voltage generated by the ADB circuit is changed from 858 mV to 798 mV as the input power increases from -50 dBm to 0 dBm. As a result, the dynamic range represented by the input P1dB point (IP1dB) has an increase of 6.5 dB, while LNA still maintains a high gain of 15.15 dB at low input power.

키워드

adaptive bias (ADB) circuit; variable gain low noise amplifier (VGLNA); voltage controlled resistor; JFET; diode; radar receiver
제목
Design of 6 GHz Variable-Gain Low-Noise Amplifier Using Adaptive Bias Circuit for Radar Receiver Front End
저자
Nam, Hyungseok; Nguyen, Dang-An; Kim, Yanghyun; Seo, Chulhun
DOI
10.3390/electronics12092036
발행일
2023-04
유형
Article
저널명
ELECTRONICS
권
12
호
9