Ka-Band CMOS x5 Frequency Multiplier With Current-Reuse Technique

초록

In this study, we propose a Ka-band x5 frequency multiplier implemented through a 65-nm CMOS process. The frequency quintupler core is merged with the common-source (CS) amplifier in a current-reuse structure to achieve low power consumption. To further improve harmonic suppression, the interstage matching network of the frequency quintupler core is constructed using a third-order high-pass filter (HPF). The proposed quintupler core was implemented as a high conversion gain x5 frequency multiplier along with input/output buffer and notch filter. The size of the proposed x5 frequency multiplier was 0.81 x 0.95 mm, including the input and output buffers. Furthermore, the measurement results of the x5 frequency multiplier showed that the conversion gain for the 27.3-28.6 GHz range was 30.7-31.3 dB at input power values of -34 dBm, and the harmonic suppression is in the 30.9-37.5 dBc. In the operating frequency band, the input and output return losses are greater than 10 dB, and the power consumption was 23 mW.

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