Electrical stabilities of half-Corbino thin-film transistors with different gate geometries

Citations

SCOPUS

2

초록

In this study, the bias-temperature stress and current-temperature stress induced by the electrical stabilities of half-Corbino hydrogenated-amorphous-silicon (a-Si:H) thin-film transistors (TFTs) with different gate electrode geometries fabricated on the same substrate were examined. The influence of the gate pattern on the threshold voltage shift of the half-Corbino a-Si:H TFTs is discussed in this paper. The results indicate that the half-Corbino a-Si:H TFT with a patterned gate electrode has enhanced power efficiency and improved aperture ratio when compared with the half-Corbino a-Si:H TFT with an unpatterned gate electrode and the same source/drain electrode geometry. © 2012 Copyright The Korean Information Display Society.

키워드

bias-temperature stress; current-temperature stress; gate geometry; half-Corbino; thin-film transistor
제목
Electrical stabilities of half-Corbino thin-film transistors with different gate geometries
저자
Jung, H.; Choi, K.-Y.; Lee, H.
DOI
10.1080/15980316.2011.652197
발행일
2012
유형
Article
저널명
Journal of Information Display
권
13
호
1
페이지
51 ~ 54