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Electrical stabilities of half-Corbino thin-film transistors with different gate geometries
- Jung, H.;
- Choi, K.-Y.;
- Lee, H.
SCOPUS
2초록
In this study, the bias-temperature stress and current-temperature stress induced by the electrical stabilities of half-Corbino hydrogenated-amorphous-silicon (a-Si:H) thin-film transistors (TFTs) with different gate electrode geometries fabricated on the same substrate were examined. The influence of the gate pattern on the threshold voltage shift of the half-Corbino a-Si:H TFTs is discussed in this paper. The results indicate that the half-Corbino a-Si:H TFT with a patterned gate electrode has enhanced power efficiency and improved aperture ratio when compared with the half-Corbino a-Si:H TFT with an unpatterned gate electrode and the same source/drain electrode geometry. © 2012 Copyright The Korean Information Display Society.
키워드
- 제목
- Electrical stabilities of half-Corbino thin-film transistors with different gate geometries
- 저자
- Jung, H.; Choi, K.-Y.; Lee, H.
- 발행일
- 2012
- 유형
- Article
- 권
- 13
- 호
- 1
- 페이지
- 51 ~ 54
- 발행국가
- 대한민국
- 분량
- 4 페이지
- ISSN
- E 2158-1606
P 1598-0316